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 TEA1742T
GreenChip PFC controller
Rev. 01 -- 10 February 2009 Objective data sheet
1. General description
The TEA1742T is a controller for Power Factor Correction (PFC). Its high level of integration allows the design of a cost-effective power supply with a very low number of external components. The special built-in green functions provide high efficiency at all power levels. This applies to quasi-resonant operation at high power levels and quasi-resonant operation with valley skipping. The TEA1742T enables highly efficient and reliable supplies with power requirements of up to 500 W, to be designed easily and with the minimum number of external components.
2. Features
2.1 Distinctive features
I Universal mains supply operation (70 V (AC) to 276 V (AC)) I Dual boost PFC with accurate output voltage (NXP patented) I High level of integration, resulting in a very low external component count and a cost-effective design I Low start-up supply voltage
2.2 Green features
I Valley/zero voltage switching for minimum switching losses (NXP patented) I Frequency limitation to reduce switching losses I High ohmic resistive dividers possible to minimize losses
2.3 Protection features
I I I I I I Safe restart mode for system fault conditions Continuous mode protection by means of demagnetization detection (NXP patented) Accurate OverVoltage Protection (OVP) Open control loop protection IC OverTemperature Protection (OTP) Low and adjustable OverCurrent Protection (OCP) trip level
NXP Semiconductors
TEA1742T
GreenChip PFC controller
3. Applications
I The device can be used in all applications that require an efficient and cost-effective PFC solution up to 500 W. PC power supplies in particular can benefit from the high level of integration and high efficiency
4. Ordering information
Table 1. Ordering information Package Name TEA1742T SO8 Description plastic small outline package; 8 leads; body width 3.9 mm Version SOT96-1 Type number
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
2 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
5. Block diagram
PFCDRIVER 7 PFC DRIVER
1.12 V 3.5 V
PFC GATE
DRV
LOW VIN VINSENSE 2 BOOST PFCCOMP 3 MAX PFC PROT PROT ENABLE PFC R Q S
1.25 V
VOSENSE 5
2.50 V 8 A
3.7 V
PFC OSC
BOOST VoOVP VoSHORT
VSTART VUVLO LOW VIN PFC PROT
SMPS CONTROL
START STOP PFC
OTP Vcc<4V
S LATCHED R PROTECTION PROT
OCP BLANK PFC DRIVER ENABLE PFC
60 A
PFCSENSE
6
500 mV
VoSHORT VUVLO
SAFE R RESTART PROTECTION
S
SOFT START
START STOP PFC TEMP TIMER 4 s INTERNAL SUPPLY ZCS VSTART OTP
PFCAUX 4
VALLEY DETECT
PFCGATE
TIMER 50 s VUVLO
100 mV
1 GND
8 VCC
014aaa734
Fig 1.
Block diagram
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
3 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
6. Pinning information
6.1 Pinning
GND VINSENSE PFCCOMP PFCAUX
1 2
8 7
VCC PFCDRIVER PFCSENSE VOSENSE
TEA1742T
3 4
014aaa735
6 5
Fig 2.
Pin configuration: TEA1742T (SOT96-1)
6.2 Pin description
Table 2. Symbol GND VINSENSE PFCCOMP PFCAUX VOSENSE PFCSENSE PFCDRIVER VCC Pin description Pin 1 2 3 4 5 6 7 8 Description ground sense input for mains voltage frequency compensation pin for PFC input from auxiliary winding for demagnetization timing for PFC sense input for PFC output voltage programmable current sense input for PFC gate driver output for PFC supply voltage
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
4 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
7. Functional description
7.1 General control
The TEA1742T contains a controller for a power factor correction circuit. A typical configuration is shown in Figure 3.
7 4 3
6
5 8 VCC
TEA1742T
2 1
014aaa736
Fig 3.
Typical configuration
7.1.1 Start-up and UnderVoltage LockOut (UVLO)
The control logic activates the internal circuitry when the voltage on pin VCC passes the Vstartup level. First, the soft start capacitor on the PFCSENSE pin is charged. When the soft start capacitor on the PFCSENSE pin is charged, the PFC circuit is activated. See Figure 4. When one of the protection functions is activated, the converter stops switching. For a restart protection the VCC has to be pulled below Vth(UVLO) to reset the protection. For a latched protection (OTP), the VCC has to drop below about 4 V (typ).
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
5 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
VSTART VUVLO VCC Vstart(VINSENSE) Vstop(VINSENSE) VINSENSE soft start PFCSENSE
PFCDRIVER
VOSENSE apply starting mains and VCC converter normal operation protection restart
014aaa737
Fig 4.
Start-up sequence, normal operation and restart sequence
7.1.2 Supply management
All internal reference voltages are derived from a temperature compensated and trimmed on-chip band gap circuit. Internal reference currents are derived from a temperature compensated and trimmed on-chip current reference circuit.
7.1.3 OverTemperature Protection (OTP)
An accurate internal temperature protection is provided in the circuit. When the junction temperature exceeds the thermal shut-down temperature, the IC stops switching. OTP is a latched protection. It can be reset by removing the voltage on pin VCC.
7.2 Power factor correction circuit
The power factor correction circuit operates in quasi-resonant or discontinuous conduction mode with valley switching. The next primary stroke is only started when the previous secondary stroke has ended and the voltage across the PFC MOSFET has reached a minimum value. The voltage on the PFCAUX pin is used to detect transformer demagnetization and the minimum voltage across the external PFC MOSFET switch.
7.2.1 ton control
The power factor correction circuit is operated in ton control. The resulting mains harmonic reduction of a typical application is well within the class-D requirements.
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
6 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
7.2.2 Valley switching and demagnetization (PFCAUX pin)
The PFC MOSFET is switched on after the transformer is demagnetized. Internal circuitry connected to the PFCAUX pin detects the end of the secondary stroke. It also detects the voltage across the PFC MOSFET. The next stroke is started if the voltage across the PFC MOSFET is at its minimum in order to reduce switching losses and ElectroMagnetic Interference (EMI) (valley switching). If no demagnetization signal is detected on the PFCAUX pin, the controller generates a Zero Current Signal (ZCS), 50 ms (typ) after the last PFCGATE signal. If no valley signal is detected on the PFCAUX pin, the controller generates a valley signal 4 ms (typ) after demagnetization was detected. To protect the internal circuitry, for example during lightning events, it is advisable to add a 5 k series resistor to this pin. To prevent incorrect switching due to external disturbance, the resistor should be placed close to the IC on the printed circuit board.
7.2.3 Frequency limitation
To optimize the transformer and minimize switching losses, the switching frequency is limited to fsw(PFC)max. If the frequency for quasi-resonant operation is above the fsw(PFC)max limit, the system switches over to discontinuous conduction mode. Also here, the PFC MOSFET is only switched on at a minimum voltage across the switch (valley switching).
7.2.4 Mains voltage compensation (VINSENSE pin)
The mathematical equation for the transfer function of a power factor corrector contains the square of the mains input voltage. In a typical application this results in a low bandwidth for low mains input voltages, while at high mains input voltages the Mains Harmonic Reduction (MHR) requirements may be hard to meet. To compensate for the mains input voltage influence, the TEA1742T contains a correction circuit. Via the VINSENSE pin the average input voltage is measured and the information is fed to an internal compensation circuit. With this compensation it is possible to keep the regulation loop bandwidth constant over the full mains input range, yielding a fast transient response on load steps, while still complying with class-D MHR requirements. In a typical application, the bandwidth of the regulation loop is set by a resistor and two capacitors on the PFCCOMP pin.
7.2.5 Soft start-up (pin PFCSENSE)
To prevent audible transformer noise at start-up or during hiccup, the transformer peak current, IDM, is increased slowly by the soft start function. This can be achieved by inserting RSS1 and CSS1 between pin PFCSENSE and current sense resistor RSENSE1. An internal current source charges the capacitor to VPFCSENSE = Istart(soft)PFC x RSS1. The voltage is limited to Vstart(soft)PFC. The start level and the time constant of the increasing primary current level can be adjusted externally by changing the values of RSS1 and CSS1. softstart = 3 x R SS1 x C SS1
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
7 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
The charging current Istart(soft)PFC flows as long as the voltage on pin PFCSENSE is below 0.5 V (typ). If the voltage on pin PFCSENSE exceeds 0.5 V, the soft start current source starts limiting the current Istart(soft)PFC. As soon as the PFC starts switching, the Istart(soft)PFC current source is switched off; see Figure 5.
S1
Istartup(soft)PFC 60 A
SOFT START CONTROL
RSS1
11 PFCSENSE
0.5 V
OCP
CSS1 RSENSE1
014aaa157
Fig 5.
Soft start-up of PFC
7.2.6 Dual boost PFC
The PFC output voltage is modulated by the mains input voltage. The mains input voltage is measured via the VINSENSE pin. The current is sourced from the VOSENSE pin if the voltage on the VINSENSE pin drops below 2.2 V (typ). To ensure the stability of the switch-over 200 mV is inserted around the 2.2 V, see Figure 6. For low VINSENSE input voltages, the output current is 8 mA (typ). This output current, in combination with the resistors on the VOSENSE pin, sets the lower PFC output voltage level at low mains voltages. At high mains input voltages the current is switched to zero. The PFC output voltage will then be at its maximum. As this current is zero in this situation, it does not effect the accuracy of the PFC output voltage. For proper switch-off behavior, the VOSENSE current is switched to its maximum value, 8 mA (typ), as soon as the voltage on pin VOSENSE drops below 2.1 V (typ).
2.2 V
VVINSENSE
-8 A II(VOSENSE)
014aaa738
Fig 6.
Voltage to current transfer function for dual boost PFC
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
8 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
7.2.7 Overcurrent protection (PFCSENSE pin)
The maximum peak current is limited cycle-by-cycle by sensing the voltage across an external sense resistor, RSENSE1, on the source of the external MOSFET. The voltage is measured via the PFCSENSE pin.
7.2.8 Mains undervoltage lockout / brownout protection (VINSENSE pin)
To prevent the PFC from operating at very low mains input voltages, the voltage on the VINSENSE pin is sensed continuously. As soon as the voltage on this pin drops below the Vstop(VINSENSE) level, switching of the PFC is stopped. The voltage on pin VINSENSE is clamped to a minimum value, Vstart(VINSENSE) + Vpu(VINSENSE), for a fast restart as soon as the mains input voltage is restored after a mains dropout.
7.2.9 Overvoltage protection (VOSENSE pin)
To prevent output overvoltage during load steps and mains transients, an overvoltage protection circuit is built in. As soon as the voltage on the VOSENSE pin exceeds the Vovp(VOSENSE) level, switching of the power factor correction circuit is inhibited. Switching of the PFC recommences as soon as the VOSENSE pin voltage drops below the VOVP(VOSENSE) level again. When the resistor between pin VOSENSE and ground is open, the overvoltage protection is also triggered.
7.2.10 PFC open-loop protection (VOSENSE pin)
The power factor correction circuit does not start switching until the voltage on the VOSENSE pin is above the Vth(ol)(VOSENSE) level. This protects the circuit from open-loop and VOSENSE short situations.
7.2.11 Driver (pin PFCDRIVER)
The driver circuit to the gate of the power MOSFET has a current sourcing capability of typically -500 (TBF) mA and a current sink capability of typically 1.2 (TBF) A. This permits fast turn-on and turn-off of the power MOSFET for efficient operation.
8. Limiting values
Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Voltages VCC VPFCCOMP VVINSENSE VVOSENSE VPFCAUX supply voltage voltage on pin PFCCOMP voltage on pin VINSENSE voltage on pin VOSENSE voltage on pin PFCAUX current limited -0.4 -0.4 -0.4 -0.4 -25 -0.4 +38 +5 +5 +5 +25 +5 V V V V V V Parameter Conditions Min Max Unit
VPFCSENSE voltage on pin PFCSENSE
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
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NXP Semiconductors
TEA1742T
GreenChip PFC controller
Table 3. Limiting values ...continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Currents IPFCSENSE General Ptot Tstg Tj ESD VESD electrostatic discharge voltage human body model machine model charged device model
[1] [2]
Parameter current on pin PFCSENSE
Conditions
Min -1
Max +10 +2 0.45 +150 +150
Unit mA A W C C
IPFCDRIVER current on pin PFCDRIVER total power dissipation storage temperature junction temperature
duty cycle < 10 % Tamb < 75 C
-0.8 -55 -20
class 1
[1] [2]
-
2000 200 500
V V V
Equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor. Equivalent to discharging a 200 pF capacitor through a 0.75 H coil and a 10 resistor.
9. Thermal characteristics
Table 4. Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air; JEDEC test board Typ 150 Unit K/W
10. Characteristics
Table 5. Characteristics Tamb = 25 C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into the IC; unless otherwise specified. Symbol Vstartup Vth(UVLO) Vhys ICC(oper) Vrst(latch) Vstop(VINSENSE) Vstart(VINSENSE) Vpu(VINSENSE) Parameter start-up voltage undervoltage lockout threshold voltage hysteresis voltage operating supply current latched reset voltage stop voltage on pin VINSENSE start voltage on pin VINSENSE pull-up voltage difference on pin VINSENSE active after Vstop(VINSENSE) is detected 0.86 1.11 Vstartup - Vth(UVLO) no load on pin PFCDRIVER Conditions Min Typ 10.6 10.3 0.3 4 0.89 1.15 -100 0.92 1.19 Max Unit V V V mA V V V mV Supply voltage management (pin VCC)
Input Voltage Sensing PFC (pin VINSENSE)
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
10 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
Table 5. Characteristics ...continued Tamb = 25 C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into the IC; unless otherwise specified. Symbol Ipu(VINSENSE) Parameter pull-up current on pin VINSENSE Conditions active after Vstop(VINSENSE) is detected Min -55 4.0 Typ -47 Max -40 Unit A V
Vmvc(VINSENSE)max maximum mains voltage compensation voltage on pin VINSENSE II(VINSENSE) Vbst(dual) input current on pin VINSENSE VINSENSE > Vstop(VINSENSE) after Vstart(VINSENSE) is detected dual boost voltage current switch-over point switch-over region Loop compensation PFC (pin PFCCOMP) gm IO(PFCCOMP) Vclamp(PFCCOMP) transconductance output current on pin PFCCOMP clamp voltage on pin PFCCOMP zero on-time voltage on pin PFCCOMP maximum on-time voltage on pin PFCCOMP PFC on-time VVINSENSE = 3.3 V, VPFCCOMP = Vton(PFCCOMP)max VVINSENSE = 0.9 V, VPFCCOMP = Vton(PFCCOMP)max Output voltage sensing PFC (pin VOSENSE) Vth(ol)(VOSENSE) Vreg(VOSENSE) Vovp(VOSENSE) Ibst(dual) open-loop threshold voltage on pin VOSENSE regulation voltage on pin VOSENSE overvoltage protection voltage on pin VOSENSE dual boost current VVINSENSE < Vbst(dual) or VVOSENSE < 2.1 V VVINSENSE > Vbst(dual) Overcurrent protection PFC (pin PFCSENSE) Vsense(PFC)max tleb(PFC) Iprot(PFCSENSE) maximum PFC sense voltage PFC leading edge blanking time protection current on pin PFCSENSE V/t = 50 mV/s V/t = 200 mV/s for IO(PFCCOMP) = 0 VVOSENSE to IO(PFCCOMP) VVOSENSE = 2.0V VVOSENSE = 3.3V Low power mode, PFC off, lower clamp voltage Upper clamp voltage Vton(PFCCOMP)zero Vton(PFCCOMP)max
[1]
5 60 33 -45 2.5 3.4 1.20
33 2.2 200 80 39 -39 2.7 3.9 3.5 1.25
100 100 45 -33 2.9 3.6 1.30
nA V mV A/V A A V V V V
[1]
Pulse width modulator PFC ton(PFC) 3.6 30 4.5 40 5.0 53 s s
-
1.15
-
V
2.475 2.500 2.525 V 2.60 0.49 0.51 250 -50 2.63 -8 -30 0.52 0.54 310 2.67 0.55 0.57 370 -5 V A nA V V ns nA
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
11 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
Table 5. Characteristics ...continued Tamb = 25 C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into the IC; unless otherwise specified. Symbol Istart(soft)PFC Vstart(soft)PFC Rstart(soft)PFC Oscillator PFC fsw(PFC)max toff(PFC)min (V/t)vrec(PFC) tvrec(PFC) tto(vrec)PFC maximum PFC switching frequency minimum PFC off-time PFC valley recognition voltage change with time PFC valley recognition time PFC valley recognition time-out time comparator threshold voltage on pin PFCAUX PFC demagnetization time-out time protection current on pin PFCAUX source current on pin PFCDRIVER sink current on pin PFCDRIVER VPFCAUX = 50 mV VPFCAUX = 1 V peak-peak
[2]
Parameter PFC soft start current PFC soft start voltage PFC soft start resistance
Conditions
Min -75
Typ -60 0.50 125 1.4 4
Max -45 0.54 150 1.7 1.7 50 6
Unit A V k kHz s V/s ns s
Soft start PFC (pin PFCSENSE) enabling voltage 0.46 12 100 1.1 3
Valley switching PFC (pin PFCAUX)
Demagnetization management PFC (pin PFCAUX) Vth(comp)PFCAUX tto(demag)PFC Iprot(PFCAUX) -150 40 -75 -100 50 -50 60 -5 mV s nA
Driver (pin PFCDRIVER) Isrc(PFCDRIVER) Isink(PFCDRIVER) VPFCDRIVER = 2 V VPFCDRIVER = 2 V VPFCDRIVER = 10 V VO(PFCDRIVER)max maximum output voltage on pin PFCDRIVER IC protection level temperature hysteresis of IC protection level temperature -0.5 TBF 0.7 TBF 1.2 TBF 11 12 A A A V
Temperature protection Tpl(IC) Tpl(IC)hys 130 140 10 150 C C
[1] [2]
For a typical application with a compensation network on pin PFCCOMP, like the example in Figure 3. Minimum required voltage change time for valley recognition on pin PFCAUX.
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
12 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
11. Application information
Capacitor CVCC buffers the IC supply voltage, which has to be supplied by external means. Sense resistor RSENSE1 converts the current through the MOSFET S1 into a voltage at pin PFCSENSE. The value of RSENSE1 defines the maximum primary peak current in MOSFETS S1. RS1 is added to prevent the soft start capacitor from being charged during normal operation due to negative voltage spikes across the sense resistor. Resistor RAUX1 is added to protect the IC from damage during lightning events.
D1 C BUS
S1
CSS1
RSS1
RSENSE1 RAUX1 RS1
7
COMPENSATION
6
5
4 3
8
CVCC
TEA1742T
2 1
014aaa739
Fig 7.
Typical application diagram TEA1742T
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
13 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
12. Package outline
SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 A1 pin 1 index Lp 1 e bp 4 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 0.069 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012
0.010 0.057 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.041 0.228 0.016 0.024
8o o 0
Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03 JEDEC MS-012 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-18
Fig 8.
TEA1742T_1
Package outline SOT96-1 (SO8)
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
14 of 17
NXP Semiconductors
TEA1742T
GreenChip PFC controller
13. Revision history
Table 6. Revision history Release date 20090210 Data sheet status Objective data sheet Change notice Supersedes Document ID TEA1742T_1
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
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TEA1742T
GreenChip PFC controller
14. Legal information
14.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
14.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
14.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected
14.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. GreenChip -- is a trademark of NXP B.V.
15. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
TEA1742T_1
(c) NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 01 -- 10 February 2009
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NXP Semiconductors
TEA1742T
GreenChip PFC controller
16. Contents
General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Distinctive features . . . . . . . . . . . . . . . . . . . . . . 1 Green features . . . . . . . . . . . . . . . . . . . . . . . . . 1 Protection features . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 General control . . . . . . . . . . . . . . . . . . . . . . . . . 5 Start-up and UnderVoltage LockOut (UVLO) . . 5 Supply management. . . . . . . . . . . . . . . . . . . . . 6 OverTemperature Protection (OTP) . . . . . . . . . 6 Power factor correction circuit. . . . . . . . . . . . . . 6 ton control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Valley switching and demagnetization (PFCAUX pin) . . . . . . . . . . . . . . . . . . . . . . . . . . 7 7.2.3 Frequency limitation . . . . . . . . . . . . . . . . . . . . . 7 7.2.4 Mains voltage compensation (VINSENSE pin). 7 7.2.5 Soft start-up (pin PFCSENSE) . . . . . . . . . . . . . 7 7.2.6 Dual boost PFC . . . . . . . . . . . . . . . . . . . . . . . . 8 7.2.7 Overcurrent protection (PFCSENSE pin) . . . . . 9 7.2.8 Mains undervoltage lockout / brownout protection (VINSENSE pin). . . . . . . . . . . . . . . . 9 7.2.9 Overvoltage protection (VOSENSE pin) . . . . . . 9 7.2.10 PFC open-loop protection (VOSENSE pin) . . . 9 7.2.11 Driver (pin PFCDRIVER) . . . . . . . . . . . . . . . . . 9 8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9 9 Thermal characteristics. . . . . . . . . . . . . . . . . . 10 10 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 10 11 Application information. . . . . . . . . . . . . . . . . . 13 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16 14.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 14.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 14.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 14.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 15 Contact information. . . . . . . . . . . . . . . . . . . . . 16 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 1 2 2.1 2.2 2.3 3 4 5 6 6.1 6.2 7 7.1 7.1.1 7.1.2 7.1.3 7.2 7.2.1 7.2.2
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 10 February 2009 Document identifier: TEA1742T_1


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